| Latest: FreeRTOS V7.1.1 was released May 1, 2012. View the change history. |
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ST STM32F4xx Cortex-M4F Demo
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See also the FAQ My application does not run, what could be wrong?
The IAR Embedded Workbench workspace for the STM32F4xx demo is called RTOSDemo.eww, and is located in the FreeRTOS/Demo/CORTEX_M4F_STM32F407ZG-SK directory of the official FreeRTOS .zip file download.
This demo application demonstrates:
Demo application tasks are split between standard demo tasks, and demo specific tasks. Standard demo tasks are used by all FreeRTOS ports and demo applications. They have no purpose other than to demonstrate the FreeRTOS API, and test a port.
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mainCREATE_SIMPLE_LED_FLASHER_DEMO_ONLY setting
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Description
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| Set to 1 |
This creates a very simple example that creates three
standard demo "flash" tasks. Each of the three tasks toggles an
LED at a fixed but different frequency. LEDs STAT1, STAT2 and STAT3
are used.
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| Set to 0 |
This is a very comprehensive demo that creates 46 tasks before
starting the scheduler, then continuously dynamically creates and
deletes another two tasks as the application executes.
It creates a lot of queues, a software timer, and different types of semaphore. The tasks consist mainly of the standard demo tasks. The demo includes application specific "register test" tasks. These are idle priority tasks that start by filling all the generic and floating point registers with known values. The tasks then repeatedly check that each register maintains the value written to it, as it enters and exits the Running state, for the lifetime of the task. Each of the two register check tasks uses a different set of known values, and a value being unexpectedly changed is symptomatic of an error in the context switching mechanism. The floating point interrupt nesting test starts in the tick hook function. The tick hook function is an optional application defined function that is called from the real time kernels tick interrupt if configUSE_TICK_HOOK is set to 1 in FreeRTOSConfig.h. The tick hook function fills the floating point registers with a known value, then forces a medium priority interrupt to interrupt it. The medium priority interrupt fills the floating point registers with a different value, before it too forces a high priority interrupt to interrupt it. The high priority interrupt fills the floating point registers with yet another value. As the interrupt nesting stack then unwinds, first the medium priority interrupt checks that the floating point registers contain the values that it wrote to them, and then the tick hook function (the lowest priority interrupt) checks that the floating point registers contain the values that it wrote to them. A 'check' software timer is created and started to periodically inspects the standard demo tasks and register test tasks, to ensure they are all operating as expected, and have never reported an error. The check timer callback function toggles LED STAT4 to give visual feedback of the system status. If LED STAT4 toggles every 3 seconds, then the check software timer has not discovered any problems with the execution of the test and demo tasks. If the rate at which LED STAT4 toggles increases to every 200 milliseconds, then the check software timer has discovered a problem in at least one task. Like the simple flasher demo, the comprehensive demo creates the standard demo flash tasks, which toggle LEDs STAT1, STAT2 and STAT3 at fixed but different frequencies. |
This sets the frequency of the RTOS tick interrupt. The supplied value of 1000Hz is useful for testing the kernel functionality but is faster than most applications require. Lowering this value will improve efficiency.
See the kernel configuration documentation for full information on these configuration constants.
Whereas configKERNEL_INTERRUPT_PRIORITY and configMAX_SYSCALL_INTERRUPT_PRIORITY are full eight bit shifted raw values, defined to be used directly in the Cortex-M4F NVIC registers, configLIBRARY_LOWEST_INTERRUPT_PRIORITY and configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY are equivalents defined using just the 4 priority bits available on the STM32. The ST Standard Peripheral Library function NVIC_Init(), and the CMSIS library function NVIC_SetPriority(), both require the unshifted 4 bit format.
Attention please!: Remember that Cortex-M cores use numerically low priority numbers to represent HIGH priority interrupts. This can seem counter-intuitive and is easy to forget! If you wish to assign an interrupt a low priority do NOT assign it a priority of 0 (or other low numeric value) as this will result in the interrupt actually having the highest priority in the system - and therefore potentially make your system crash if this priority is above configMAX_SYSCALL_INTERRUPT_PRIORITY. Also, do not leave interrupt priorities unassigned, as by default they will have a priority of 0 and therefore the highest priority possible.
The lowest priority on a Cortex-M core is in fact 255 - however different Cortex-M vendors implement a different number of priority bits and supply library functions that expect priorities to be specified in different ways. For example, on STM32 microcontrollers the lowest priority you can specify is in fact 15 - this is defined by the constant configLIBRARY_LOWEST_INTERRUPT_PRIORITY in FreeRTOSConfig.h. The highest priority that can be assigned is always zero.
It is also recommended to ensure that all four priority bits are assigned as being preemption priority bits, and none as sub priority bits, as they are in the provided demo.
Each port #defines 'portBASE_TYPE' to equal the most efficient data type for that processor. This port defines portBASE_TYPE to be of type long.
Note that portEND_SWITCHING_ISR() will leave interrupts enabled.
As an example, this demo provides an interrupt service routine called EXTI9_5_IRQHandler(), which is defined in main.c. This interrupt is triggered by pressing the button marked "USER" on the starter kit hardware. The interrupt uses a semaphore to synchronise with a task, and calls portEND_SWITCHING_ISR to ensure the interrupt returns directly to the task. The function is shown below:
void EXTI9_5_IRQHandler(void)
{
long lHigherPriorityTaskWoken = pdFALSE;
/* Only line 6 is enabled, so there is no need to test which line generated
the interrupt. */
EXTI_ClearITPendingBit( EXTI_Line6 );
/* This interrupt does nothing more than demonstrate how to synchronise a
task with an interrupt. First the handler releases a semaphore.
lHigherPriorityTaskWoken has been initialised to zero. */
xSemaphoreGiveFromISR( xTestSemaphore, &lHigherPriorityTaskWoken );
/* If there was a task that was blocked on the semaphore, and giving the
semaphore caused the task to unblock, and the unblocked task has a priority
higher than the currently executing task (the task that this interrupt
interrupted), then lHigherPriorityTaskWoken will have been set to pdTRUE.
Passing pdTRUE into the following macro call will cause this interrupt to
return directly to the unblocked, higher priority, task. */
portEND_SWITCHING_ISR( lHigherPriorityTaskWoken );
}
Only FreeRTOS API functions that end in "FromISR" can be called from an interrupt service routine - and then only if the priority of the interrupt is less than or equal to that set by the configMAX_SYSCALL_INTERRUPT_PRIORITY configuration constant.