Quality RTOS & Embedded Software

 Real time embedded FreeRTOS RSS feed 
Real time embedded FreeRTOS mailing list 
Quick Start Supported MCUs PDF Books Trace Tools Ecosystem TCP & FAT Training



Posted by gourmetsel on August 5, 2016

I'm using an STM32F10 microcontroller with FreeRTOS V8.2.3 port for the Cortex M3. The microcontroller has four priority bits implemented. I understood that the highest priority of any interrupt using system calls is defined by configMAXSYSCALLINTERRUPTPRIORITY. FreeRTOS expects this priority to be stored in the upper nibble of configMAXSYSCALLINTERRUPTPRIORITY for this specific core.

configMAXSYSCALLINTERRUPTPRIORITY will be written to the BASEPRI register to enter a critical section and zero will be written to it when exiting the critical section (basically this disables the function of BASEPRI). This is the reason why configMAXSYSCALLINTERRUPTPRIORITY shall never be set to zero.

I saw in xPortStartScheduler in port.c that configMAXSYSCALLINTERRUPTPRIORITY is explicitly asserted to being non-zero: configASSERT( configMAXSYSCALLINTERRUPTPRIORITY );

I just wanted to share that it might make sense to include the position of the priority bits of the particular core into this assertion. For the microcontroller I'm using in this case, I could set configMAXSYSCALLINTERRUPT_PRIORITY to 0x0F, not get the assertion to fail, but still break the critical section mechanism.

In this case the assert could look like:


where CM3PRIORITYMASK is 0xF0.



Posted by rtel on August 5, 2016

Thank you for the interesting input.

There is no real portable way of achieving this without adding in additional dependencies on the FreeRTOSConfig.h values, as currently only configMAXSYSCALLINTERRUPTPRIORITY and configKERNELINTERRUPT_PRIORITY are mandated. However, the code does manually check the number of priority bits implemented by testing the hardware directly - so the assert could then be moved to that part of the code (where the number of bits is known).


alternate (4063 bytes)

[ Back to the top ]    [ About FreeRTOS ]    [ Sitemap ]    [ ]

Copyright (C) 2004-2010 Richard Barry. Copyright (C) 2010-2016 Real Time Engineers Ltd.
Any and all data, files, source code, html content and documentation included in the FreeRTOSTM distribution or available on this site are the exclusive property of Real Time Engineers Ltd.. See the files license.txt (included in the distribution) and this copyright notice for more information. FreeRTOSTM and FreeRTOS.orgTM are trade marks of Real Time Engineers Ltd.

Latest News:

FreeRTOS V9.0.0 is now available for download.

Free TCP/IP and file system demos for the RTOS

Sponsored Links

⇓ Now With No Code Size Limit! ⇓
⇑ Free Download Without Registering ⇑

FreeRTOS Partners

ARM Connected RTOS partner for all ARM microcontroller cores

Renesas Electronics Gold Alliance RTOS Partner.jpg

Microchip Premier RTOS Partner

RTOS partner of NXP for all NXP ARM microcontrollers

Atmel RTOS partner supporting ARM Cortex-M3 and AVR32 microcontrollers

STMicro RTOS partner supporting ARM7, ARM Cortex-M3, ARM Cortex-M4 and ARM Cortex-M0

Xilinx Microblaze and Zynq partner

Silicon Labs low power RTOS partner

Altera RTOS partner for Nios II and Cortex-A9 SoC

Freescale Alliance RTOS Member supporting ARM and ColdFire microcontrollers

Infineon ARM Cortex-M microcontrollers

Texas Instruments MCU Developer Network RTOS partner for ARM and MSP430 microcontrollers

Cypress RTOS partner supporting ARM Cortex-M3

Fujitsu RTOS partner supporting ARM Cortex-M3 and FM3

Microsemi (previously Actel) RTOS partner supporting ARM Cortex-M3

Atollic Partner

IAR Partner

Keil ARM Partner

Embedded Artists