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Doubts about ISR priority

Posted by spl12 on February 25, 2011
Hi everybody!

I've some doubts about the use of "configMAX_SYSCALL_INTERRUPT" and "configKERNEL_INTERRUPT ". In the guide provided by FreeRTOS is explained that all API that can be used in interrupt (those ones terminating with fromISR) must have a priority between configMAX_SYSCALL_INTERRUPT and configKERNEL_INTERRUPT.

I'm using a MCU CORTEX-M3(ENERGY MICRO) and these two value are respectively set to:

#define configMAX_SYSCALL_INTERRUPT_PRIORITY 191 /* equivalent to 0xa0, or priority 5. */

My doubts are, the exceptions like Hard fault, bus fault, memory managemnt fault are considered as interrupt less than 191 (since in M3 the priority is opposite)? Or should be considered with a priority 255 as Systick and PendSV ?

Could you explain me which is the mapping between the CORTEX-M3 interrupt and FreeRTOS interrupt? How can I understand that the interrupt of peripheral that I gonna to use is higher than configMAX_SYSCALL_INTERRUPT?

Thanks in advance!

RE: Doubts about ISR priority

Posted by MEdwards on February 25, 2011
Cortex cores can have up to 255 different priorities, but most manufacturers use only a subset of the available 8 bits. Some 3, some 4 and some 5, that I am aware of. The bits that are implemented are shifted to the most significant bits in the possible 8 bits available. That is why 191 is equivalent to priority 5. 5 in binary is 0000 0101, and shifted into the most significant bits (assuming 3 bits are implemented so it gets shifted 5 places) this becomes 1010 0000. However, because in the future the chip might implement more bits of priority, places that are shifted over are actually set to 1, not 0. That makes it 1011 1111, or 191 in decimal. Took me forever to work that out myself. Having unused bits set to 1 is not a problem, because they are, well, unused.

CMSIS functions to set priorities will do the shift for you. Functions provided by some libraries will not. It is a real mine field. See bullet 3 on www.freertos.org/FAQHelp.html

Another gotcha. On Cortex cores, failing to set an interrupt priority means it will end up with the highest possible priority, not as might be expected, the lowest.

The fault exceptions have even higher priority than 0, so in ARMs world of reverse logic, that means their priorities are actually negative.

RE: Doubts about ISR priority

Posted by Richard Damon on February 25, 2011
The thing to remember is the reason for the priority rules in FreeRTOS is so that the kernel can mask off the lower priority interrupts to prevent contention for updates on key memory locations inside critical sections. Faults (and any non-maskable interrupts on machines with them) are not masked by the critical section, so if they access FreeRTOS APIs they may corrupt those locations, so should not access FreeRTOS.

RE: Doubts about ISR priority

Posted by spl12 on February 25, 2011
HI Guys,
Thanks a lot for your quick responses!

I realized that I had to study a bit better the CORTEX user manual :-) .
Now, I just wanna to check if I really understood the topic and cover some other doutbs. So, in CORTEX-M3 we have both exceptions with fixed priority ( Reset, Hard fault, and NMI exceptions) and configurable priority (all of the rest). We need to keep outside from FreeRTOS kernel the fixed ones (as explained in previous post).

In the case where :
#define configMAX_SYSCALL_INTERRUPT_PRIORITY 191 /* equivalent to 0xa0, or priority 5. */

We need to define a priority between 7 – 5 for those exceptions (even for external interrupts) used in FreeRTOS’ API.

While, can I use priority between 4 – 0 for external interrupts (with extreme needs to proceed right away) without using FreeRTOS functions, right?

Usually in priority between 4-0, a part of Interrupts, Can I find some other exceptions like fault handlers or system handlers (without considering fixed ones and those that are used in FreeRTOS’ APIs)?

Moreover, in my project I need to know the priority defined in FreeRTOS for exceptions different from Interrupts. I mean Fault and System handlers.
I’ve tried to look for them in FreeRTOS but I didn’t find anything (a part Systick in CMSIS that it is not used in FreeRTOS). Do you have any idea?

Thanks a lot for your help and I hope that this post can be useful for somebody else coming after me.

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