Quality RTOS & Embedded Software

 Real time embedded FreeRTOS RSS feed 
Real time embedded FreeRTOS mailing list 
Quick Start Supported MCUs PDF Books Trace Tools Ecosystem TCP & FAT Training




Loading

a qustion in portENTER_SWITCHING_ISR in at91s

Posted by ares.qi on June 26, 2006
I have a question in portENTER_SWITCHING_ISR in at91sam7s with gcc port. Please help me.

in the macro

#define portENTER_SWITCHING_ISR()

________portSAVE_CONTEXT();\
________asm volatile ( "SUBR11, LR, #4" );\
________{


why do we need the R11 -- frame pointer? I think compile will use fp automatively, is it right?
Or we use it just want to save some IRQ stack space??


RE: a qustion in portENTER_SWITCHING_ISR in at91s

Posted by Nobody/Anonymous on June 26, 2006
This is what I think:

The frame pointer switch is only required because the demo uses "naked" interrupt service routines.

If the function was not naked then the compiler would move the stack pointer to make room for the local variables. Variable are than accessed using an offset from the frame pointer.

As the function is naked the stack never gets adjusted, and the stack frame never setup. This means the offsets from the frame pointer will clobber data.

The code you highlight allows the task stack to be used for local storage instead, which can be used safely. Offsets are then into unused parts of the task stack. The stack still uses IRQ stack, so nothing gets corrupted.

Take a look at the STR9 port files. This saves the context before the VIC is read. I think this could be a better solution but has the overhead of the context being saved for every IRQ even if it is not going to cause a context switch.


[ Back to the top ]    [ About FreeRTOS ]    [ Sitemap ]    [ ]




Copyright (C) 2004-2010 Richard Barry. Copyright (C) 2010-2016 Real Time Engineers Ltd.
Any and all data, files, source code, html content and documentation included in the FreeRTOSTM distribution or available on this site are the exclusive property of Real Time Engineers Ltd.. See the files license.txt (included in the distribution) and this copyright notice for more information. FreeRTOSTM and FreeRTOS.orgTM are trade marks of Real Time Engineers Ltd.

Latest News:

FreeRTOS V9.0.0 is now available for download.


Free TCP/IP and file system demos for the RTOS


Sponsored Links

⇓ Now With No Code Size Limit! ⇓
⇑ Free Download Without Registering ⇑


FreeRTOS Partners

ARM Connected RTOS partner for all ARM microcontroller cores

Renesas Electronics Gold Alliance RTOS Partner.jpg

Microchip Premier RTOS Partner

RTOS partner of NXP for all NXP ARM microcontrollers

Atmel RTOS partner supporting ARM Cortex-M3 and AVR32 microcontrollers

STMicro RTOS partner supporting ARM7, ARM Cortex-M3, ARM Cortex-M4 and ARM Cortex-M0

Xilinx Microblaze and Zynq partner

Silicon Labs low power RTOS partner

Altera RTOS partner for Nios II and Cortex-A9 SoC

Freescale Alliance RTOS Member supporting ARM and ColdFire microcontrollers

Infineon ARM Cortex-M microcontrollers

Texas Instruments MCU Developer Network RTOS partner for ARM and MSP430 microcontrollers

Cypress RTOS partner supporting ARM Cortex-M3

Fujitsu RTOS partner supporting ARM Cortex-M3 and FM3

Microsemi (previously Actel) RTOS partner supporting ARM Cortex-M3

Atollic Partner

IAR Partner

Keil ARM Partner

Embedded Artists