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(More) Fun With SiLabs Chips.

Posted by J.T. on March 22, 2007
On the Cygnal Port I am getting a couple of warnings on Compile.
"partest.c lines 168, 170, 174. Warning 84: 'auto' variable 'ucBit' maybe used before initialization."

I happily ignored them and chugged on to convert from the demo uC to the F330.
As suggested I have commented out SFR paging and started to redefine register values to match the locations in my chip. So far the only big change is the Lack of flash space and PLL, so my clock is running at 25MHz instead of 100MHz. (There is some built in Xram so I can stay in the large memory model... )

To try and reduce the size of the code that will go to my flash, I removed the function calls to initialize several tasks. Is preventing the calls to the vStartXXXXX going to:
A) optimize them away and result in a smaller footprint that will fit on my flash
B) Leave me with a functional OS. (I.E. is preventing creation of the tasks all i need to do to scale the system down and keep them from running?)


I would just keep trucking and updating code where necessary... but it would be nice to know if I'm doing all this work for naught.

Thanks for all the help. :( eventually I'll get it all..

J.T.

RE: (More) Fun With SiLabs Chips.

Posted by David Hawks on March 22, 2007
A) I'm not sure about the SDCC compiler, but on the Keil C51 compiler, just eliminating the calls is not sufficient. You must actually remove the functions. This is probably compiler specific, though. Just comment one out, compile, and check your memory map to find out.

B) Eliminating demo tasks will still leave a functional OS. You could just create one task and then start the scheduler (technically, you could start the scheduler without creating any tasks, but that wouldn't be too useful).

RE: (More) Fun With SiLabs Chips.

Posted by J.T. on March 22, 2007
Thanks David. :)


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