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STM32 Primer HardFault (Help!)

Posted by https://www.google.com/accounts on March 28, 2010
Hi All

I'm trying to get stm std peripheral lib V3.2.0 working with FreeRTOS 6.0.4. on stm primer1 GCC.
It crashes in here:
void vPortStartFirstTask( void )
__asm volatile(
" ldr r0, =0xE000ED08 \n" /* Use the NVIC offset register to locate the stack. */
" ldr r0, [r0] \n"
" ldr r0, [r0] \n"
" msr msp, r0\n" /* Set the msp back to the start of the stack. */
" svc 0\n" /* System call to start first task. */

Everything works ok in demo project relying on old V0.2 lib.

RE: STM32 Primer HardFault (Help!)

Posted by Richard on March 28, 2010
I'll ask the obvious question first - do you have the correct SVC handler installed? vPortSVCHandler should be in the 9th position of the vector table.

The next less obvious one is, where is the stack? When the Cortex M3 boots it looks at the first interrupt vector to find where the stack is located. When FreeRTOS starts the kernel finds the vector table to in turn find the stack so the stack pointer can be set back to the beginning of the stack region (this is what the code in your post is doing). Some STM32 projects (not provided by me) have two stack regions, first one that is in internal RAM and located using the vector table, then another in external RAM (which I don't think the Primer has). If it switches to use the external RAM stack before FreeRTOS starts then the kernel will set the stack pointer back to the start of the wrong stack [I have no idea why you would want the stack in external RAM, but will ask ST next time I talk to them].


RE: STM32 Primer HardFault (Help!)

Posted by https://www.google.com/accounts on March 29, 2010
Lol - handlers were missing - indeed!!! Thanks.

To All - who is facing new Std lib (3.0 and up) from STM:

You will need to add 3 handlers into stm32f10x_it.c:

void SysTick_Handler(void)
void PendSV_Handler( void ) __attribute__ (( naked ));
void PendSV_Handler(void)

__asm volatile
"mrs r0, psp\n"
"ldrr3, pxCurrentTCBConst\n" /* Get the location of the current TCB. */
"ldrr2, [r3]\n"
"stmdb r0!, {r4-r11}\n" /* Save the remaining registers. */
"str r0, [r2]\n" /* Save the new top of stack into the first member of the TCB. */
"stmdb sp!, {r3, r14}\n"
"mov r0, %0\n"
"msr basepri, r0\n"
"bl vTaskSwitchContext\n"
"mov r0, #0\n"
"msr basepri, r0\n"
"ldmia sp!, {r3, r14}\n"
"\n"/* Restore the context, including the critical nesting count. */
"ldr r1, [r3]\n"
"ldr r0, [r1]\n" /* The first item in pxCurrentTCB is the task top of stack. */
"ldmia r0!, {r4-r11}\n" /* Pop the registers. */
"msr psp, r0\n"
"bx r14\n"
".align 2\n"
"pxCurrentTCBConst: .word pxCurrentTCB\n"

void SVC_Handler( void ) __attribute__ (( naked ));

void SVC_Handler(void)

__asm volatile (
"ldrr3, pxCurrentTCBConst2\n" /* Restore the context. */
"ldr r1, [r3]\n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
"ldr r0, [r1]\n" /* The first item in pxCurrentTCB is the task top of stack. */
"ldmia r0!, {r4-r11}\n" /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
"msr psp, r0\n" /* Restore the task stack pointer. */
"mov r0, #0 \n"
"msrbasepri, r0\n"
"orr r14, #0xd\n"
"bx r14\n"
".align 2\n"
"pxCurrentTCBConst2: .word pxCurrentTCB\n"


P.S. richardbarry. I had to copy 'asm' context handlers from port.s since new LIB format initializes all interrupt handlers in the standard startup .s file to 0. Unless you declare handler with the same name. Not sure if that is the way to do this.

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