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Port 5.20 Free RTOS in Cortex

Posted by Christian on May 7, 2009
Hello,

I'd like to know if you can help me. I port the new free rtos version in a new Cortex-M3 project in IAR. There is no call in my created task and it is stalled in vPortStartFirstTask()

vPortStartFirstTask
/* Use the NVIC offset register to locate the stack. */
ldr r0, =0xE000ED08
ldr r0, [r0]
ldr r0, [r0]
/* Set the msp back to the start of the stack. */
msr msp, r0
/* Call SVC to start the first task. */
svc 0 <<<<<<<<<<<<<<<<<<< STOP HERE

What does it mean?

Thanks


RE: Port 5.20 Free RTOS in Cortex

Posted by MEdwards on May 7, 2009
Check the vector table, do you have vPortSVCHandler installed as the SVC handler? Look at the file startup_ewarm.c in Demo\CORTEX_LM3Sxxxx_IAR_Keil for an example.

RE: Port 5.20 Free RTOS in Cortex

Posted by Christian on May 7, 2009
Yes I have this handler in the vector. I wonder if global interrupts are disabled!

Regards




RE: Port 5.20 Free RTOS in Cortex

Posted by MEdwards on May 7, 2009
Interrupts should be disabled at that point, the svc instruction is synchronous and will execute even when interrupts are disabled.

RE: Port 5.20 Free RTOS in Cortex

Posted by ComCle on June 10, 2009
I got the same problem with 5.30 of Free RTOS. The vector table looks like this:

__attribute__ ((section(".isr_vector")))
void (* const g_pfnVectors[])(void) =
{
(void (*)(void))((unsigned long)pulStack + sizeof(pulStack)),
// The initial stack pointer
ResetISR, // The reset handler
NmiSR, // The NMI handler
FaultISR, // The hard fault handler
IntDefaultHandler, // The MPU fault handler
IntDefaultHandler, // The bus fault handler
IntDefaultHandler, // The usage fault handler
0, // Reserved
0, // Reserved
0, // Reserved
0, // Reserved
vPortSVCHandler,// SVCall handler
IntDefaultHandler, // Debug monitor handler
0, // Reserved
xPortPendSVHandler, // The PendSV handler
xPortSysTickHandler, // The SysTick handler
IntDefaultHandler, // GPIO Port A

...

It should work, but cpu stucks at svc command in vPortStartFirstTask.
Can anyone help?

RE: Port 5.20 Free RTOS in Cortex

Posted by ComCle on June 17, 2009
OK, i found the Problem with SVC Command in the Cortex-M3.

It is a general problem while debugging with GDB and openocd. During Step-wise debugging, interrupts are disabled. SVC command causes an interrupt, so the command doesn't work during stepping.

I found several suggestion in openOCD forums that i should enable interrupts again with "monitor cortex_m3 maskisr off" in the gdb console. This didn't work.

After 2 days of searching a solution, it has shown that the problem was a wrong openOCD and GDB configuration. (It seems that 99% all problems are openOCD config problems)

Now i use openocd from the YAGARTO Homepage ( r1888+patch) with the following openocd Configuration files: interface/luminary.cfg target/lm3s6965.cfg, and following Startup code for GDB:

target extended-remote localhost:3333
monitor soft_reset_halt
load
break main
continue

Every works now. After startup troubles, the Luminary Cortex-M3 µCs + Codesourcery Lite + FreeRTOS + openOCD + Eclipse works great.


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