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AT91SAM7S256 stability problem

Posted by Nobody/Anonymous on October 5, 2006
Hello ,
we have a serious problem with the AT91SAM7S256.

We have realized a project with AT91SAM7S256 and FreeRTOS 4.05.
We use 3 tasks with the same priority an idle task and a tick rate of 1 ms (PREEMPTION = YES).
We use the watchdog. It works.If we place a while(1); command for testing in the Main task the system restarts without any problems.
It works fine.

On some boards the systems stops after a short while.
All outputs are redefined as inputs and the xtal - oszilator stops working.
The time between startup and the problem varies from board to board (some minutes up to some days).

We are not able to debug the problem with JTAG / Jlink.
A connected Jlink changes the timing and the problem doesn`t occured.
In the past we noticed that the problem happend when we transfered and received data on UART 0 with DMA. After we have disabeled the DMA transmission it seemed to be fixed .
In the current project we use DMA only for receiving data.
We also use SPI (without DMA and Interrrupt) and TWI/I2C with Interrupt.

Does anybody has an idea or a posible reason for this strange behaviour?
Does anybody has an idea why the conroller doesn`t restart in this error case?

Thanks a lot

RE: AT91SAM7S256 stability problem

Posted by Nobody/Anonymous on October 5, 2006
> Hello ,
> we have a serious problem with the AT91SAM7S256.
>
> We have realized a project with AT91SAM7S256 and FreeRTOS 4.05.
> We use 3 tasks with the same priority an idle task and a tick rate of 1
> ms (PREEMPTION = YES).
> We use the watchdog. It works.If we place a while(1); command for testing in
> the Main task the system restarts without any problems.
> It works fine.


So your saying that the watchdog does not work when the scheduler is running? By default the scheduler uses the PIT to generate the tick interrupt. The PIT uses the system interrupt. Does the watchdog also use the system interrupt? If so you might want to use a different timer to generate the tick interrupt.


>
> On some boards the systems stops after a short while.
> All outputs are redefined as inputs and the xtal - oszilator stops working.

Sounds like the problem is the oscillator ??? If the oscillator is not working the SAM7 will be a dead dog.


> We are not able to debug the problem with JTAG / Jlink.
> A connected Jlink changes the timing and the problem doesn`t occured.


This is a big clue to your problem. The Jlink does not effect the timing. Do you use different build options in the code when building for debug? If so then this is what is causing the different timing.



RE: AT91SAM7S256 stability problem

Posted by Nobody/Anonymous on October 6, 2006
Hello,
thanks for your answer.
The watchdog is working very well and it is tested
and resets the system (core & peripheral) correct.

When the problem occured, we see these:

> no xtal function, no dc at these contacts (switched off by controller like when starting up)
> all ports were inputs (we tried with a resistor to VCC and VSS, no significant current flows)
(like when starting up when power is applied)
> no reaction on the reset pin (seemed to be switched off by the controller)
> no JLink control possible

The power supply is ok, 1,8V from internal regulator are ok, too.

There is no possibility to restart the system without cutting the power line.

regards

Rudi

RE: AT91SAM7S256 stability problem

Posted by Nobody/Anonymous on October 11, 2006
We get a hint from our distributor that Atmel observe problems with the watchdog on AT91SAM7S256.
After we have disabled the watchdog it works.


RE: AT91SAM7S256 stability problem

Posted by Neil Bradley on October 17, 2006
FYI - I'm running it with an AT91SAM7S256 running 5 different threads, including an ISR for two UARTs and signalling between threads, and everything is OK on my end. Has been stable for days on end.


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