Quality RTOS & Embedded Software

 Real time embedded FreeRTOS RSS feed 
Real time embedded FreeRTOS mailing list 
Quick Start Supported MCUs PDF Books Trace Tools Ecosystem TCP & FAT Training




Loading

protected data inside critical section

Posted by GregK on October 26, 2008
Hi

I have some doubts, please forgive trivial question.

from documentation about taskENTER_CRITICAL()
"Macro to mark the start of a critical code region. Preemptive context switches cannot occur when in a critical region."

We disable interrupts but other type of context switch can still happened(?)

lets consider that code, aim is protect variable "protectedVar":


============================================================
taskENTER_CRITICAL();

protectedVar = something;
(...)
if( xQueueSendToBack( xQueue1,&ulVar,10 ) != pdPASS )
{

}

(...)

something2 = protectedVar+2; // in this line var protectedVar could be corrupted because xQueueSendToBack() could cause context switch


taskEXIT_CRITICAL();
============================================================

send message to other task with higher priority could cause context switch anyway, I have tested it on port PIC24.

My questions is:
1. Is it desirable feature of port what I use? in other words is my example code wrong from definition?

2. If answer on 1 is Yes, so is only cause why freeRTOS maintain separate uxCriticalNesting value for every task or maybe there are any other reasons?

Kind Regards
/Grzegorz K.

RE: protected data inside critical section

Posted by Richard on October 26, 2008
> I have some doubts, please forgive trivial question.

Its not actually a trivial question.

> from documentation about taskENTER_CRITICAL() "Macro to mark
> the start of a critical code region. Preemptive context
> switches cannot occur when in a critical region."

The key here is 'Preemptive'. The critical region protects against preemptive context switches - what happens for other types of context switch actually depends on the port but for nearly all ports users can force a context switch within a critical section if they want. It would not be normal to do so, but you have the flexibility if you want it. One case where you may want this ability is to ensure that when a task starts executing again (gets switched back in) that it immediately has exclusive access to some resource.


Regards.

RE: protected data inside critical section

Posted by GregK on October 26, 2008
Thank You Richard.
That's clear. May be useful if this hint will be in documentation, what you think?

So in theory, if I do not need that feature I can remove maintaining uxCriticalNesting for every task and keep global variable? or there could be some side effects depend on port?

Best Regards
/Grzegorz K.


RE: protected data inside critical section

Posted by Richard on October 26, 2008
> So in theory, if I do not need that feature I can remove
> maintaining uxCriticalNesting for every task and keep global
> variable? or there could be some side effects depend on port?

No - the kernel code itself uses the feature, although I am moving away from this reliance in the newer ports. The critical nesting count has to remain as part of the task context.

Regards.


[ Back to the top ]    [ About FreeRTOS ]    [ Sitemap ]    [ ]




Copyright (C) 2004-2010 Richard Barry. Copyright (C) 2010-2016 Real Time Engineers Ltd.
Any and all data, files, source code, html content and documentation included in the FreeRTOSTM distribution or available on this site are the exclusive property of Real Time Engineers Ltd.. See the files license.txt (included in the distribution) and this copyright notice for more information. FreeRTOSTM and FreeRTOS.orgTM are trade marks of Real Time Engineers Ltd.

Latest News:

FreeRTOS V9.0.0 is now available for download.


Free TCP/IP and file system demos for the RTOS


Sponsored Links

⇓ Now With No Code Size Limit! ⇓
⇑ Free Download Without Registering ⇑


FreeRTOS Partners

ARM Connected RTOS partner for all ARM microcontroller cores

Renesas Electronics Gold Alliance RTOS Partner.jpg

Microchip Premier RTOS Partner

RTOS partner of NXP for all NXP ARM microcontrollers

Atmel RTOS partner supporting ARM Cortex-M3 and AVR32 microcontrollers

STMicro RTOS partner supporting ARM7, ARM Cortex-M3, ARM Cortex-M4 and ARM Cortex-M0

Xilinx Microblaze and Zynq partner

Silicon Labs low power RTOS partner

Altera RTOS partner for Nios II and Cortex-A9 SoC

Freescale Alliance RTOS Member supporting ARM and ColdFire microcontrollers

Infineon ARM Cortex-M microcontrollers

Texas Instruments MCU Developer Network RTOS partner for ARM and MSP430 microcontrollers

Cypress RTOS partner supporting ARM Cortex-M3

Fujitsu RTOS partner supporting ARM Cortex-M3 and FM3

Microsemi (previously Actel) RTOS partner supporting ARM Cortex-M3

Atollic Partner

IAR Partner

Keil ARM Partner

Embedded Artists