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Test System

The table below details the prototyping board and development tools with which the Cygnal (fast 8051 instruction set compatible microcontroller from Silicon Laboratories) tests were performed.

Hardware Setup

Prototyping Board

C8051F120-TB prototyping board direct from Silicon Laboratories



Clock Frequency

Internal oscillator and PLL (Phase Locked Loop) configured to provide 98MHz, and measured at 99MHz

RAM interface


ROM interface


Development Tools Setup


SDCC V2.4.0 - Free, open source C compiler

Debug information

No debug information included in build.


Peep hole optimization was turned off as it caused compilation errors. All other optimization was left at default.

This is the maximum speed for the processor. The cache registers were left in their default state.

SDCC is a capable freeware compiler but probably produces less efficient code than some commercial compilers.

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