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FreeRTOS+TCP and Xilinx Ultrascale + A53

Posted by johndesign100 on April 19, 2017

I was wondering if there was a port of FreeRTOS+TCP and the demos (FTP and HTTP servers) to the Xilinx Ultrascale plus A53? If not how difficult would this be to do ourselves? (time?) Are there any documents that might help us? FreeRTOS has been ported. (http://www.freertos.org/RTOS-Xilinx-UltraScaleMPSoC64-bit.html Cortex-A53 Xilinx UltraScale MPSoC). We do not need FAT nor the CLI. thanks

FreeRTOS+TCP and Xilinx Ultrascale + A53

Posted by rtel on April 19, 2017

If the Ethernet MAC used on UltraScale A53 is the same as that used on the Zynq then there should not be any porting required, and you can use the existing Zynq FreeRTOS+TCP demo as a reference for which files need to be included and which configuration options to set.

If the MAC hardware is different then you will have to create your own port, which basically involves creating a thin layer between the MAC driver provided to you by Xilinx and FreeRTOS+TCP - as described here: http://www.freertos.org/FreeRTOS-Plus/FreeRTOSPlusTCP/EmbeddedEthernetPorting.html

FreeRTOS+TCP and Xilinx Ultrascale + A53

Posted by glenenglish on April 19, 2017

John There is a well documented port to the Zynq Cortex A9. That's a good place to start.There is quite alot floating around on the net about it, in addition to what is here on this site.

Do you have prior experience with the Zynq in a bare metal environment ? How difficult depends on your experience... The hard bit is figuring out all the stuff you need to do at initialization time, and interrupt behaviour . There are linux ports, and they are a good start for some of the initialization and ethernet / interrupt controller aspects.

Of course, FreeRTOS is a single processor OS (there are some multi processor ports around experimental but it loses its simplicity) , and there is 1,2,4 processors on the ZU.

I am considering running linux on one core and FreeRTOS on the other core in a new project....


FreeRTOS+TCP and Xilinx Ultrascale + A53

Posted by heinbali01 on April 20, 2017

Nothing to add after the above comments.

Except for posting the latest version of portable/NetworkInterface/Zynq, see ZIP file here below.

The driver now is 100% interrupt-driven and zero-copy. I tested it on a MicroZed in combination with iperf3, and also in combination with WolfSSL.

For transmission, a counting-semaphore is being used. It literally counts the number of free TX DMA-descriptors. The function xNetworkInterfaceOutput() will take the semaphore. Once the transmission is finished, emacps_check_tx() will give to the semaphore.

For reception, every RX DMA-descriptor refers to the pucEthernetBuffer of a network buffer. When a packet has arrived, a new buffer will be assigned and the old one is passed to the IP-task. When pxGetNetworkBufferWithDescriptor() fails, the arrived packet will be dropped and the buffer will not be replaced.


Zynq_200417.zip (23686 bytes)

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