Is it possible to use a FIQ instead of the VIC as the interrupt source for the timer interrupt to improve efficiency of the scheduler? This is for the STR9. -Dave
It’s certainly possible, but I don’t think it’ll improve efficiency much. IIUC, the difference between IRQ and FIQ is mainly that your first ISR instruction gets executed a few cycles sooner, and you have more FIQ-only registers, so you might not have to save/restore the regs of the interrupted task. However, if the timer interrupt causes a task switch, you _will_ have to save/restore all the registers. Also, there’s nothing time-critical that has to happen as soon as possible after the timer interrupt. The next tick isn’t going to occur for a long time (at least a millisecond, if you’re running at the scheduler at 1kHz) and the amount of work that has to happen to schedule the next task is the same, whether it starts 6 cycles after the tick or 20. All using FIQ for the timer interrupt does, I think, is eliminate FIQ as a possible solution for some application that really needs the "Fast" in FIQ. d.
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