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ARM Cortex M0 non-functional bug

Posted by Robert Turner on January 25, 2012
Hi, just thought I'd mention that there's a textual bug that in the FreeRTOSConfig.h there's a #define mapping the "FreeRTOS port interrupt handlers to their CMSIS standard names" for "SVC_Handler", while in port.c it's got the slightly different spelling of "SVCall_Handler".
Otherwise, cheers for the great port!

RE: ARM Cortex M0 non-functional bug

Posted by Richard on January 25, 2012
Ok - here is the story...

The Cortex-M3 port pre-dates the CMSIS definition, so its interrupt handlers do not use the CMSIS names, and a mapping to CMSIS is provided in FreeRTOSConfig.h. The Cortex-M0 port, being new, uses the CMSIS names directly in port.c, so the lines in FreeRTOSConfig.h are obsolete (which is why the code works without modification). I have to confess to using a FreeRTOSConfig.h form a Cortex-M3 port, and these lines got left in unintentionally - and therefore made it onto the documentation page too.

Now though, seeing that the name of the function is not identical to other ports (some use SVCall_Handler (apparently as you noticed), and some SVC_Handler, it has made me nervous of using the CMSIS names directly in the FreeRTOS code, so I will change the CM0 port to use the same mechanism used by the Cortex-M3. That means the lines in FreeRTOSConfig.h will be needed after all. I will change them to be correct for the LPCXpresso demo, and change their names in port.c - check everything is ok - then upload the files again for the current separate download. I will make the same changes in SVN to ensure they are included in the official download too.

Thanks for bringing this to my attention.

Just to be clear - the code as it is will work - the lines in FreeRTOSConfig.h because the lines in FreeRTOSConfig.h don't have any effect.


RE: ARM Cortex M0 non-functional bug

Posted by Robert Turner on January 25, 2012
Thanks for the response Richard. I hope the title wasn't misleading - I also found the port to work without any fixes.

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