Port to TI CC2538

Hello all, I am about to finish porting FreeRTOS v8.0.1 to the Texas Instruments CC2538 SoC (Cortex M3 + 802.15.4 radio) for an IoT platform named OpenMote (http://www.openmote.com/). The basics are already working just fine (I have a demo with tasks and semaphores using SysTicks), but I am stuck trying to get tickless support to work. I developed my own vPortSetupTimerInterrupt, vPortSuppressTicksAndSleep and SleepTimerHandler functions based on those of the Atmel SAM examples but replacing the ASF functions from the Atmel library with those of the Texas Instruments library (which by the way is not as great since it does no comply to CMSIS). I have also installed the SleepTimerHandler to the interrupt table. If I try my RTC code outside of FreeRTOS it works just fine, the uC goes to low-power mode until the RTC expires and the process is repatead on and on without problems. However, when I integrate it with FreeRTOS it stops working. It looks like the interrupt is fired the first time but does not continue to fire any more. The FreeRTOSConfig.h looks like the following:

define configCPUCLOCKHZ 16000000

define configSYSTICKCLOCKHZ 32768

define configUSETICKLESSIDLE 1

define configTICKRATEHZ ( ( TickType_t ) 128 )


 #define configPRIO_BITS               __NVIC_PRIO_BITS


 #define configPRIO_BITS               4        /* 15 priority 
levels */







If I disable the configUSETICKLESSIDLE and configure the appropriate values for the clocks then the demo works just fine, so I asume the vector table and the interrupt priorities are fine. Any other ideas where I could look at? Regards, Pere

Port to TI CC2538

Are you using a critical section inside your SuppressTicksAndSleep function? If so, are you using the taskENTER/EXIT_CRITICAL() macros, or are you globally disabling and enabling interrupts by setting the appropriate bit in the status register? You must use the latter for it to work... The taskENTER/EXIT_CRITICAL() macros don't disable interrupts on the Cortex-M core, they only mask off up to a certain interrupt priority. If the RTC interrupt is masked off by this priority then it can't bring the Cortex-M out of low power mode. On the other hand, by way of some magic in the Cortex-M core, if you leave the interrupt mask such that it does not mask off any interrupts, but instead globally disable interrupts, the RTC interrupt will be able to bring the Cortex-M core out of low power mode, although the interrupt won't actually be executed until interrupts are globally enabled again. Regards.