Quality RTOS & Embedded Software

 Real time embedded FreeRTOS RSS feed 
Quick Start Supported MCUs PDF Books Trace Tools Ecosystem


FreeRTOS + Zynq 7000: nested interrupts do not work

Posted by jimbuteau on June 13, 2018

soc: XC7Z020 with dual cortexA9 (Trenz TE0720) sdk: 2017.2 os: FreeRTOS 9.0 interrupt driver: scugicv37

My system is running well (single core) with several interrupts but without interrupt nesting (pre-emption). My two highest priority interrupts are running at priority 18 (TTC) and 19 (axidma). I would very much like nested interrupt handling to work so that the timer interrupt could pre-empt the dma interrupt (as well as all the other lower priority interrupts).

In searching for a solution the closest I've come is from 2014: https://www.xilinx.com/support/answers/54128.html

Unfortunately this solution does not work for me and leads to problems.

First of all, the addition of the following line (as instructed):

XScuGic_CPUWriteReg(InstancePtr, XSCUGIC_BIN_PT_OFFSET, 0x03);

results in an ASSERT fail at:


Secondly, if I skip the XSCUGICBINPTOFFSET write and just insert the two functions, XilEnableNestInterrupts() and XilDisableNestInterrupts() in my interrupt handler(s) as instructed my program crashes at taskEXITCRITICAL() in xTaskResumeAll() after the very first interrupt handler call.

Note the the scugic driver html doc contains the comment: Nested interrupts are not supported by this driver

Am I going about this the right way? I would VERY MUCH like to have this feature working and would greatly appreciate any help at all.

FreeRTOS + Zynq 7000: nested interrupts do not work

Posted by rtel on June 13, 2018

Sorry for brief reply at this time - but FreeRTOS manages the interrupts so I shouldn't get too distracted by Xilinx docs unless they are specific to their FreeRTOS BSP. The Zynq demo in the FreeRTOS kernel download includes interrupt nesting tests so perhaps you could use those as a reference for how to set this up. Look at the "IntQTimer" files which configures different timers at different interrupt priorities.

[ Back to the top ]    [ About FreeRTOS ]    [ Privacy ]    [ Sitemap ]    [ ]

Copyright (C) Amazon Web Services, Inc. or its affiliates. All rights reserved.

Latest News

FreeRTOS v10.2.1 is available for immediate download. MIT licensed, includes 64-bit RISC-V, NXP Cortex-M33 demo & Nuvoton Cortex-M23 demo.

NXP tweet showing LPC5500 (ARMv8-M Cortex-M33) running FreeRTOS.

View a recording of the "OTA Update Security and Reliability" webinar, presented by TI and AWS.


FreeRTOS and other embedded software careers at AWS.

FreeRTOS Partners

ARM Connected RTOS partner for all ARM microcontroller cores

Cadence Tensilica Cortes

Espressif ESP32

IAR Partner

Microchip Premier RTOS Partner

RTOS partner of NXP for all NXP ARM microcontrollers





STMicro RTOS partner supporting ARM7, ARM Cortex-M3, ARM Cortex-M4 and ARM Cortex-M0

Texas Instruments MCU Developer Network RTOS partner for ARM and MSP430 microcontrollers

OpenRTOS and SafeRTOS

Xilinx Microblaze and Zynq partner