Quality RTOS & Embedded Software

 Real time embedded FreeRTOS RSS feed 
Quick Start Supported MCUs PDF Books Trace Tools Ecosystem


Loading

Bug in the ez80

Posted by Nobody/Anonymous on March 6, 2007
The timer_isr function implemented in C change the CPU flags before the assembly code save the "af" registers.
The timer_isr must be written in assembler to come around(for ez80L92):

;
.assume adl=1
.def _timer_isr
.ref _vTaskIncrementTick
.ref _vTaskSwitchContext
.ref _pxCurrentTCB

_timer_isr:

; portSAVE_CONTEXT();

PUSH IX
push af ; save flags
LD IX,0
ADD IX,SP
in0 a,(80h)
push bc
push de
push hl
push iy
ex af,af'
exx
push af
push bc
push de
push hl
ld ix,0
add ix,sp
ld hl,(_pxCurrentTCB)
ld (hl),ix

CALL _vTaskIncrementTick

CALL _vTaskSwitchContext

; portRESTORE_CONTEXT_ISR();

ld hl,(_pxCurrentTCB)
ld hl,(hl)
ld sp,hl
pop hl
pop de
pop bc
pop af
exx
ex af,af'
pop iy
pop hl
pop de
pop bc
pop af
pop ix
ei
reti

Best regards:
Ivar Jeppesen
Embedit A/S
Denmark


[ Back to the top ]    [ About FreeRTOS ]    [ Privacy ]    [ Sitemap ]    [ ]


Copyright (C) Amazon Web Services, Inc. or its affiliates. All rights reserved.

Latest News

Version 10.1.1 of the FreeRTOS kernel is available for immediate download. MIT licensed.

View a recording of the "OTA Update Security and Reliability" webinar, presented by TI and AWS.


Careers

FreeRTOS and other embedded software careers at AWS.



FreeRTOS Partners

ARM Connected RTOS partner for all ARM microcontroller cores

Espressif ESP32

IAR Partner

Microchip Premier RTOS Partner

RTOS partner of NXP for all NXP ARM microcontrollers

Renesas

STMicro RTOS partner supporting ARM7, ARM Cortex-M3, ARM Cortex-M4 and ARM Cortex-M0

Texas Instruments MCU Developer Network RTOS partner for ARM and MSP430 microcontrollers

OpenRTOS and SafeRTOS

Xilinx Microblaze and Zynq partner