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75x GCC isr problems/STR71x port

Posted by DR1 on March 2, 2008
Hello,

I'm working on a STR71X port for GCC/Rowley.

I started with the 75x/GCC port as a base. What I noticed is that the interrupt system does not work. I'm using the code in crt0_STR75x_FreeRTOS.s to manage context save/restore on entry/exit from interrupts. It seems that the portSAVE_CONTEXT macro leaves the user/system mode stack pointer pointing in an unsafe area (namely, into the area of the interrupted task's stack where it's register contents will be stored). Then, later, the IRQ_to_SYS macro switches the processor into system mode, and then calls the handler (C code) to do some work with an unsafe stack pointer (R13_usr).

Here is the chronology:
1) An IRQ interrupt occurs, processor goes to IRQ mode and uses SP_irq

2) The IRQ handler, first thing, calls portSAVE_CONTEXT which stores all of the user mode registers onto the system mode stack. You'll notice that R13_usr is the same before and after the call to portSAVE_CONTEXT, but the fucntion did in fact store necessary data on the user mode stack. This is where the stack pointer is corrupted.

3) The IRQ handler (and hardware) vectors the processor to a IRQ handler (there are 32 of these, like WAKUPIRQHandler)

4) This intermediate handler changes the mode to system mode, where the stack pointer is now R13_usr, which was left pointing at an unsafe memory area.

5) This intermediate handler then calls a c-code handler, which can do whatever. If this handler uses the stack at all (which it will) then the stored registers (stored durint portSAVE_CONTEXT) are corrupted.

As a quick fix, I added the following lines to the end of the portSAVE_CONTEXT macro:

/*; Correct sp_usr */
STMDBLR!, {LR}
LDMIALR!, {SP}^

What I want to know is if anyone has used the 75x/GCC port, using the crt0_STR75x_FreeRTOS.s file from the demo. I'm wondering if I made some mistake or if that port really has this flaw.

Thanks in advance,

DR

RE: 75x GCC isr problems/STR71x port

Posted by Richard on March 3, 2008
Please look at the UART0 handler which demonstrates how interrupts should be handled. UART0_ADDR points to the address of vSerialISR which is a standard C function - the macros that change between modes should not be used. If you want to use one of the other interrupts then simply replace the vectored to address with a standard C function to handle the interrupt.

Regards.

RE: 75x GCC isr problems/STR71x port

Posted by DR1 on March 3, 2008
Richard,

Thanks for the quick reply. I see now, ISRs are run in ISR mode on the ISR stack, no problem, simple and fast.

Have a good day,

Dave.


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