Quality RTOS & Embedded Software

 Real time embedded FreeRTOS RSS feed 
Quick Start Supported MCUs PDF Books Trace Tools Ecosystem


Loading

fromISR function assumptions and Cortex-M3

Posted by c77er on March 3, 2010
For the fromISR functions, is it assumed that the code in them is not be interrupted? For some other architectures it's a safe assumption since interrupts are automatically disabled upon entry of ISR and enabled upon exit.

However, for Cortex-M3, it's not true right? So wouldn't critical sections be a necessity here?

My explanation probably would be that the task swapping only happens in PendSV handlers, which won't be triggered until all interrupts are clear, so no critical sections are necessary? Does this explanation make sense?

Even with this explanation I'm still puzzled - well, even without task swapping, if no critical sections are used, there is still a possibility that the xxxFromISR function could still be interrupted, and the higher priority interrupt can still mess with data structures such as ready list, event list, etc. which makes this code unsafe.

Thanks in advance!

RE: fromISR function assumptions and Cortex-M3

Posted by Richard on March 4, 2010
The FromISR functions do have critical sections where necessary. This is especially important for the interrupt nesting. Inside the functions you will see macros something like portSET_INTERRUPT_PRIORITY_FROM_ISR and portCLEAR_INTERRUPT_PRIORITY_FROM_ISR. The implementation of these macros is different to that for the standard critical section macros.

Regards.


[ Back to the top ]    [ About FreeRTOS ]    [ Privacy ]    [ Sitemap ]    [ ]


Copyright (C) Amazon Web Services, Inc. or its affiliates. All rights reserved.

Latest News

Version 10.1.0 of the FreeRTOS kernel is available for immediate download. MIT licensed.

View a recording of the "OTA Update Security and Reliability" webinar, presented by TI and AWS.


Careers

FreeRTOS and other embedded software careers at AWS.



FreeRTOS Partners

ARM Connected RTOS partner for all ARM microcontroller cores

Espressif ESP32

IAR Partner

Microchip Premier RTOS Partner

RTOS partner of NXP for all NXP ARM microcontrollers

Renesas

STMicro RTOS partner supporting ARM7, ARM Cortex-M3, ARM Cortex-M4 and ARM Cortex-M0

Texas Instruments MCU Developer Network RTOS partner for ARM and MSP430 microcontrollers

OpenRTOS and SafeRTOS

Xilinx Microblaze and Zynq partner