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configMAX_SYSCALL_INTERRUPT_PRIORITY=0 CM3

Posted by ramun on May 26, 2011

Hi
I ran into a problem concerning the configMAX_SYSCALL_INTERRUPT_PRIORITY value.
I'm using the EFM32 Cortex-M3 port of FreeRTOS V6.1.0. Since I didn't want to care about the interrupt priorities, I thought it would be a good idea to set configMAX_SYSCALL_INTERRUPT_PRIORITY to 0 (the highest interrupt priority). But this leads to a sporadically crashing OS. Further examination of the problem showed that the configMAX_SYSCALL_INTERRUPT_PRIORITY is used in the function vPortSetInterruptMask to set the BASEPRI register. But I think this has not the intended effect since setting BASEPRI to zero actually enables all interrupts (disables the BASEPRI functionality) instead of disabling them.
Can anyone confirm this concern?

RE: configMAX_SYSCALL_INTERRUPT_PRIORITY=0 CM3

Posted by MEdwards on May 26, 2011
Yes I can confirm it. Don't set it to 0 because zero has a special meaning in basepri, as you found out yourself.

RE: configMAX_SYSCALL_INTERRUPT_PRIORITY=0 CM3

Posted by ramun on May 27, 2011
Ok, thanks a lot!

RE: configMAX_SYSCALL_INTERRUPT_PRIORITY=0 CM3

Posted by Richard Walters on July 18, 2012
I just got bitten by not configuring the priorities of my interrupts, so I did some research to understand ARM Cortex interrupt priorities and how they affect FreeRTOS.

One thing I came across while researching was this tidbit int he ARM v7-M architecture reference manual: "When (BASEPRI) is cleared to 0, it has no effect on the priority. A non-zero value will act as a priority mask, the execution priority when the priority defined by the BASEPRI is higher than the current executing priority".

So basically, you're right, setting configMAX_SYSCALL_INTERRUPT_PRIORITY to zero actually prevents any interrupts from being "masked", so none of your interrupt handlers can safely call into any FreeRTOS APIs.

RE: configMAX_SYSCALL_INTERRUPT_PRIORITY=0 CM3

Posted by Richard on July 19, 2012
Here are some relevant links on the FreeRTOS web site:

http://www.freertos.org/RTOS-Cortex-M3-M4.html (see very last sentence).

Regards.


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