Quality RTOS & Embedded Software

 Real time embedded FreeRTOS RSS feed 
Quick Start Supported MCUs PDF Books Trace Tools Ecosystem


Problem using semaphores

Posted by Martin on November 3, 2011
Currently I'm struggling with the usage of semaphore given from an ISR. My problem is as follow.

There is a gatekeeper task which receives a queue and triggers a SPI burst transfer (via DTC). The data transfer controller issues an interrupt when the transfer has finished. This interrupt gives the semaphore on which the gatekeeper task is waiting for. (gatekeeper in blocked state)
This sounds very easy but unfortunately it doesn't work on my hardware (Renesas SH7216).
The facts are:
- the interrupt is definitely issued (I'm calling a output toggle funktion in the ISR -> measured with oscilloscope)
- the semaphore is given in the ISR (xSemaphoreGiveFromISR return value is 1, E10A debugger used)
- if I put a wait loop just before the xSemaphoreTake, means try to take the semaphore when the semaphore is already given -> everthing is working fine (but this is not the sense of semaphores ;-)

I don't have no further ideas how to debug this problem. Is there something I should look to to find the problem.

#pragma interrupt INT_RSPI_SPTXI
void INT_RSPI_SPTXI (void)
long xHigherPriorityTaskWoken;
extern xSemaphoreHandle xBinarySemaphore_SPITX;

RSPI.SPCR.BIT.SPTIE &= 0;//Transmit interrupt disable

xHigherPriorityTaskWoken = pdFALSE;

xSemaphoreGiveFromISR(xBinarySemaphore_SPITX, &xHigherPriorityTaskWoken);

if (xHigherPriorityTaskWoken = pdPASS)
portYIELD_FROM_ISR( xHigherPriorityTaskWoken );


void prvSPIGatekeeperTask( void *pvParameters)
xSPIStruct xReceivedStructure;
uint32_t i;


xSemaphoreTake( xBinarySemaphore_SPIRX, portMAX_DELAY); //take semaphore because initial value is 1

for( ;; )
xQueueReceive(xSPIQueue,&xReceivedStructure,portMAX_DELAY);//blocked state until queue entry

setSPIBasefreq(xReceivedStructure.SPIBaseFreq);// set SPI base frequency
SetRSPI_CMD0(xReceivedStructure.SPIcmd);// set SPI command

if(RSPI.SPSR.BIT.MIDLE==1) // if SPI idle
//send and receive SPI message
dtc_SPI_io(xReceivedStructure.pDatatoTransmit, xReceivedStructure.pDatatoReceive, xReceivedStructure.cnt_DatatoTransceive);
SetSPIfunction(0xF8);//enable SPI and interrupts

/*for(i=0; i<2000; i++) //if I enable this nop loop everything is working fine because the semaphore
{ // is already given when xSemaphoreTake is reached (not a workaround!!!)

xSemaphoreTake( xBinarySemaphore_SPIRX, portMAX_DELAY); //blocked state until SPI interrupt occured


The Semaphore is created in main funktion with:

vSemaphoreCreateBinary( xBinarySemaphore_SPIRX );

Many thanks in advance.


RE: Problem using semaphores

Posted by Martin on November 3, 2011
oh sorry, I just saw that I put the wrong ISR in the previous post.

here is the correct one

#pragma interrupt INT_RSPI_SPRXI
void INT_RSPI_SPRXI (void)
long xHigherPriorityTaskWoken;
extern xSemaphoreHandle xBinarySemaphore_SPIRX;

RSPI.SPCR.BIT.SPRIE &= 0;//Receive interrupt disable

xHigherPriorityTaskWoken = pdFALSE;

debugSPI=xSemaphoreGiveFromISR(xBinarySemaphore_SPIRX, &xHigherPriorityTaskWoken);
if (xHigherPriorityTaskWoken = pdPASS)
portYIELD_FROM_ISR( xHigherPriorityTaskWoken );



RE: Problem using semaphores

Posted by Richard Damon on November 4, 2011
One thing I see, but that doesn't explain the problem, is that you are using = instead of == in testing xHigherPriorityTaskWoken.

Could you have the ISR at a wrong priority, and it is corrupting the system variables?

RE: Problem using semaphores

Posted by Martin on November 4, 2011
My problem is solved. It was a bad idea to call the ISR directly without the wrapper.
Sometimes it's realy better to read the documentation more carefully. :-)
Of course I also fixed the stupid mistake in the xHigherPriorityWoken testing code.


[ Back to the top ]    [ About FreeRTOS ]    [ Privacy ]    [ Sitemap ]    [ ]

Copyright (C) Amazon Web Services, Inc. or its affiliates. All rights reserved.

Latest News

FreeRTOS v10.2.0 is available for immediate download. MIT licensed, and including RISC-V and ARMv8-M (Cortex-M33) demos.

NXP tweet showing LPC5500 (ARMv8-M Cortex-M33) running FreeRTOS.

View a recording of the "OTA Update Security and Reliability" webinar, presented by TI and AWS.


FreeRTOS and other embedded software careers at AWS.

FreeRTOS Partners

ARM Connected RTOS partner for all ARM microcontroller cores

Cadence Tensilica Cortes

Espressif ESP32

IAR Partner

Microchip Premier RTOS Partner

RTOS partner of NXP for all NXP ARM microcontrollers





STMicro RTOS partner supporting ARM7, ARM Cortex-M3, ARM Cortex-M4 and ARM Cortex-M0

Texas Instruments MCU Developer Network RTOS partner for ARM and MSP430 microcontrollers

OpenRTOS and SafeRTOS

Xilinx Microblaze and Zynq partner