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Solved: ISR exception when optimizing

Posted by Andreas Pretzsch on September 16, 2008
Environment: LPC2378 (ARM7TDMI-S), GCC 4.3.2 (same with 4.2.2)

FreeRTOS mandates an ISR wrapper which:
- saves the task context
- calls the real handler
- restores/modifies the task context

In case there are local variables in the real handler, the wrapper has to issue an external call to the real handler because of stack preparation.
Without this call, one might run into an exception due to access beyond the memory limit.

It's perfectly legal to declare both the wrapper and the real handler as static.
When compiling with optimization (-O2), GCC may inline static functions.
This will lead to the described behaviour.

There are two ways around this:
- declare the real handler as non-static
- prevent inlineing of the real handler

I'd opt for the second variant, as declaring local functions as static is part of good coding style.

GCC provides an attribute "noinline" to achieve this.

For a working example see below. To see the effect in real life, comment out the noinline attribute.

Mr. Barry, please include this in the documentation and/or as a FAQ.
Also I'd suggest to update the provided demo codes accordingly.
Most of the demos use the non-static approach (all for ARM7).

static void xHandler(void) __attribute__ ((noinline));
static void xHandler(void)
volatile u32 a;
volatile u32 b[3];
a = 1;
b[0] = 1;

static void xISR(void) __attribute__ ((naked));
static void xISR(void)
/* Save the context of the interrupted task. */
/* Call the handler. This must be a separate function from the wrapper
to ensure the correct stack frame is set up. */
/* Restore the context of whichever task is going to run next. */

RE: Solved: ISR exception when optimizing

Posted by Richard on September 17, 2008
Thanks for your useful post.

The method for defining ARM7 interrupts was changed to the asm wrapper method because of issues in the GCC code generation. There were some subtle but quite severe bugs that only appeared at certain optimisation levels. The first work around for this was to use the -fomit-frame-pointer option, but this annoyed some users as it made debugging harder, plus it did not fix all problems. Using the asm wrapper meant that the code generated was completely under control of the application and did not allow GCC to include any bum asm instructions.

I don't know if the latest versions of GCC have fixed these issues.


RE: Solved: ISR exception when optimizing

Posted by Andreas Pretzsch on September 20, 2008
Well, I haven't had any problems both with -fomit-frame-pointer and without, regardless of optimization (O0, O2). This applies to both gcc 4.2.2 and 4.3.2, based on the yagarto toolchain.

I found a earlier thread regarding this problems, but didn't get the point completely.
So in case somebody could describe what is happening and/or how to trigger it, I'd verify the status of the actual gcc releases.

In general it would be great to have a reduced irq prologue/epilogue (e.g. register saving), as it is rather time consuming for fast periodic interrupts, sometimes leading to irq separation in low-level and FreeRTOS part.

Regarding the upgrade to gcc 4.3.2, I sent a patch to Mr. Fischer, the maintainer of the yagarto toolchain. Looks like it is not yet on his site, don't know if he is validating it still or at all.
Over here, gcc 4.3.2 runs fine, but I cannot state if all calculus optimizations introduced (GMP, MPFR) work as expected.
If anybody is interessted, please contact me via email at apr@cn-eng.de

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